On server products, for example, available from Intel Corp., the platform basic input output system (BIOS) sets up a threshold for correctable errors. Once that threshold is crossed in a given time period the BIOS creates a system event log indicating that the system will no longer log correctable errors and masks the chipset's ability to generate a system management interrupt (SMI) upon receiving a correctable error. This is done to avoid performance degradation and redundant logging of the same memory error, for instance. If the user wants to re-enable logging, the system must be reset and perform power on self test (POST) again. There is not sufficient granularity on these correctable errors, which results in a loss of logging and RAS (Reliability, Availability, and Serviceability) support.